Technical Program

DISPS-P3: Architectures for DSP

Session Type: Poster
Time: Friday, May 31, 08:00 - 10:00
Location: Poster Area H
Session Chairs: Lei Wang, University of Connecticut, Storrs, CT and Woon-Seng Gan, Nanyang Technological University, Singapore
 
DISPS-P3.1: ARCHITECTURES FOR DIGITAL FILTERS USING STOCHASTIC COMPUTING
         Yun-Nan Chang; National Sun Yat-sen University
         Keshab K. Parhi; University of Minnesota
 
DISPS-P3.2: DEPTH-BASED POSTURE RECOGNITION BY RADAR AND VISION FUSION FOR REAL-TIME APPLICATIONS
         I-Cheng Tsai; National Tsing Hua University
         Ching-Te Chiu; National Tsing Hua University
 
DISPS-P3.3: SIMPLIFIED FLOATING-POINT DIVISION AND SQUARE ROOT
         Timo Viitanen; Tampere University of Technology
         Pekka Jääskeläinen; Tampere University of Technology
         Otto Esko; Tampere University of Technology
         Jarmo Takala; Tampere University of Technology
 
DISPS-P3.4: ADAPTIVE FILTER BASED LOW COMPLEXITY DIGITAL INTENSIVE HARMONIC REJECTION FOR SDR RECEIVER
         Chunshu Li; IMEC
         Min Li; IMEC
         Marian Verhelst; IMEC
         Sofie Pollin; IMEC
         Andre Bourdoux; IMEC
         Liesbet Van Der Perre; IMEC
 
DISPS-P3.5: SNR EFFICIENT APPROACH FOR THE DESIGN OF HYBRID FILTER BANK A/D CONVERTERS
         Abla Kammoun; Supélec
         Caroline Lelandais-Perrault; Supélec
         Mérouane Debbah; Supélec
 
DISPS-P3.6: COMPARISON OF DIFFERENT PARALLEL IMPLEMENTATIONS FOR DEBLOCKING FILTER OF HEVC
         Anand Meher Kotra; IETR-INSA
         Mickaël Raulet; IETR-INSA
         Olivier Deforges; IETR-INSA
 
DISPS-P3.7: A LOW-POWER VGA FULL-FRAME FEATURE EXTRACTION PROCESSOR
         Dongsuk Jeon; University of Michigan
         Yejoong Kim; University of Michigan
         Inhee Lee; University of Michigan
         Zhengya Zhang; University of Michigan
         David Blaauw; University of Michigan
         Dennis Sylvester; University of Michigan
 
DISPS-P3.8: STATISTICAL ANALYSIS OF ALGORITHMIC NOISE TOLERANCE
         Eric Kim; University of Illinois at Urbana-Champaign
         Naresh Shanbhag; University of Illinois at Urbana-Champaign
 
DISPS-P3.9: ENERGY-EFFICIENT DETECTION SYSTEM IN TIME-VARYING SIGNAL AND NOISE POWER
         Long Le; University of Illinois at Urbana-Champaign
         David Jun; University of Illinois at Urbana-Champaign
         Douglas Jones; University of Illinois at Urbana-Champaign
 
DISPS-P3.10: REAL-TIME HARDWARE IMPLEMENTATION OF MULTI-RESOLUTION IMAGE BLENDING
         Vladan Popovic; École Polytechnique Fédérale de Lausanne (EPFL)
         Kerem Seyid; École Polytechnique Fédérale de Lausanne (EPFL)
         Alexandre Schmid; École Polytechnique Fédérale de Lausanne (EPFL)
         Yusuf Leblebici; École Polytechnique Fédérale de Lausanne (EPFL)
 
DISPS-P3.11: CONFIGURABLE, RESOURCE-OPTIMIZED FFT ARCHITECTURE FOR OFDM COMMUNICATION
         Inkeun Cho; University of Maryland
         Chung-Ching Shen; University of Maryland
         Yahia Tachwali; Agilent Technologies Incorporation
         Chia-Jui Hsu; Agilent Technologies Incorporation
         Shuvra Bhattacharyya; University of Maryland
 
DISPS-P3.12: ON-CHIP IMPLEMENTATION OF MEMORY MAPPING ALGORITHM TO SUPPORT FLEXIBLE DECODER ARCHITECTURE
         Saeed-ur Rehman; Université de Bretagne-Sud
         Awais Sani; Université de Bretagne-Sud
         Philippe Coussy; Université de Bretagne-Sud
         Cyrille Chavet; Université de Bretagne-Sud
 
DISPS-P3.13: SOFT-CORE STREAM PROCESSING ON FPGA: AN FFT CASE STUDY
         Peng Wang; Queen's University Belfast
         John McAllister; Queen's University Belfast
         Yun Wu; Queen's University Belfast
 
DISPS-P3.14: HD VIDEO DECODING SCHEME BASED ON MOBILE HETEROGENEOUS SYSTEM ARCHITECTURE
         Yu-Jung Chen; National Taiwan University
         Yu-Sheng Lin; National Taiwan University
         Hsin-Fang Wu; National Taiwan University
         Chia-Ming Chang; National Taiwan University
         Shao-Yi Chien; National Taiwan University