Technical Program

Paper Detail

Paper:DISPS-P3.12
Session:Architectures for DSP
Location:Poster Area H
Session Time:Friday, May 31, 08:00 - 10:00
Presentation Time:Friday, May 31, 08:00 - 10:00
Presentation: Poster
Topic: Design and Implementation of Signal Processing Systems: Programmable and reconfigurable DSP architectures
Paper Title: ON-CHIP IMPLEMENTATION OF MEMORY MAPPING ALGORITHM TO SUPPORT FLEXIBLE DECODER ARCHITECTURE
Authors: Saeed-ur Rehman, Awais Sani, Philippe Coussy, Cyrille Chavet, Université de Bretagne-Sud, France