Technical Program

Paper Detail

Paper:DISPS-P3.6
Session:Architectures for DSP
Location:Poster Area H
Session Time:Friday, May 31, 08:00 - 10:00
Presentation Time:Friday, May 31, 08:00 - 10:00
Presentation: Poster
Topic: Design and Implementation of Signal Processing Systems: Low-power signal processing techniques and architectures
Paper Title: COMPARISON OF DIFFERENT PARALLEL IMPLEMENTATIONS FOR DEBLOCKING FILTER OF HEVC
Authors: Anand Meher Kotra, Mickaƫl Raulet, Olivier Deforges, IETR-INSA, France