Technical Program

Paper Detail

Paper:DISPS-P2.7
Session:DSP Algorithm Implementation in Hardware and Software
Location:Poster Area G
Session Time:Friday, May 31, 08:00 - 10:00
Presentation Time:Friday, May 31, 08:00 - 10:00
Presentation: Poster
Topic: Design and Implementation of Signal Processing Systems: Programmable and reconfigurable DSP architectures
Paper Title: PROGRAMMABLE LOW POWER IMPLEMENTATION OF THE HEVC ADAPTIVE LOOP FILTER
Authors: Ilkka Hautala, Jani Boutellier, Jari Hannuksela, University of Oulu, Finland