Technical Program

Paper Detail

Paper:DISPS-P2.5
Session:DSP Algorithm Implementation in Hardware and Software
Location:Poster Area G
Session Time:Friday, May 31, 08:00 - 10:00
Presentation Time:Friday, May 31, 08:00 - 10:00
Presentation: Poster
Topic: Design and Implementation of Signal Processing Systems: DSP algorithm implementation in hardware and software
Paper Title: ARCHITECTURE OPTIMIZATIONS FOR BP POLAR DECODERS
Authors: Bo Yuan, Keshab K. Parhi, University of Minnesota, Twin cities, United States